Multilevel simulation-based co-design of next generation HPC microprocessors

This paper demonstrates the combined use of three simulation tools in support of a co-design methodology for an HPC-focused System-on-a-Chip (SoC) design. The simulation tools make different trade-offs between simulation speed, accuracy and model abstraction level, and are shown to be complementary. We apply the MUSA trace-based simulator for the initial sizing of vector register length, system-level cache (SLC) size and memory bandwidth. It has proven to be very efficient at pruning the design space, as its models enable sufficient accuracy without having to resort to highly detailed simulations. Then we apply gem5, a cycle-accurate micro-architecture simulator, for a more refined analysis of the performance potential of our reference SoC architecture, with models able to capture detailed hardware behavior at the cost of simulation speed. Furthermore, we study the network-on-chip (NoC) topology and IP placements using both gem5 for representative small- to medium-scale configurations and SESAM/VPSim, a transaction-level emulator for larger scale systems with good simulation speed and sufficient architectural details. Overall, we consider several system design concerns, such as processor subsystem sizing and NoC settings. We apply the selected simulation tools, focusing on different levels of abstraction, to study several configurations with various design concerns and evaluate them to guide architectural design and optimization decisions. Performance analysis is carried out with a number of representative benchmarks. The obtained numerical results provide guidance and hints to designers regarding SIMD instruction width, SLC sizing, memory bandwidth as well as the best placement of memory controllers and NoC form factor. Thus, we provide critical insights for efficient design of future HPC microprocessors.This work has been performed in the context of the European Processor Initiative (EPI) project, which has received funding from the European Union’s Horizon 2020 research and innovation program under Grant Agreement № 826647. A special thanks to Amir Charif and Arief Wicaksana for their invaluable contributions to the SESAM/VPSim tool in the initial phases of the EPI project.Peer ReviewedPostprint (author's final draft

21st International Meshing Roundtable

This volume contains the articles presented at the 21st International Meshing Roundtable (IMR) organized, in part, by Sandia National Laboratories and was held on October 7–10, 2012 in San Jose, CA, USA. The first IMR was held in 1992, and the conference series has been held annually since. Each year the IMR brings together researchers, developers, and application experts in a variety of disciplines, from all over the world, to present and discuss ideas on mesh generation and related topics. The technical papers in this volume present theoretical and novel ideas and algorithms with practical potential, as well as technical applications in science and engineering, geometric modeling, computer graphics, and visualization

Proceedings of the 21st International Meshing Roundtable

XIV, 606 p.online resource

Frenchess: A Cray T3D at the 8th World Computer Chess Championship

This paper presents our work on parallel search algorithms at the University of Paris 8 and the Direction des Etudes et Recherches (E.D.F.). It focuses on our parallel chess program "Frenchess' ' which, running on the Commissariat à l'Energie Atomique's 128 processors T3D, just finished third of a field of 24 at the 8th World Computer Chess Championship in Hong Kong (May 25- May 30 1995). Frenchess relies on the new ABDADA (Alpha Beta Distribué Avec Droit d'Aînesse) algorithm, an efficient and easy to implement parallel version of the alpha-beta algorithm (which was formerly known not to parallelize well). ABDADA had first been tested on a TMC CM5 and a Cray CS6400, and the adaptation to the CRAY T3D, using SHMEM, has proved very satisfying. Even though single PE performance was disappointing, the T3D gave us excellent parallel performance, proving that our ABDADA algorithm scales very well up to at least 128 processors (with a speedup of over 70 in tournament conditions), and that it takes full advantage of the T3D's fast parallel architecture: it enabled us to build a world class chess program in just a few months ' work. The ABDADA algorithm can certainly be useful for the parallelization of related problems, such as Branch and Bound problems, on this architecture

A new intrumentation for measuring static pressure fluctuations in the marine atmospheric boundary layer

International audienceThe proposed work aims at designing a new instrument for studying the behaviour of static pressure fluctuation (SPFs) in the Surface Marine Atmospheric Boundary Layer (SMABL). SPFs are among the least understood meteorological variable. They play an important role in the production or dissipation of turbulent kinetic energy and in wave generation. In addition, they are key to improving parametrizations of momentum exchanges between the sea and the atmosphere. Very few SPF data are currently available which mainly results from inadequate, see inaccurate instrumentation. The reason is that SPF amplitude is of same order of magnitude as interfering signal, in the range of 1-10 Pa. The unwanted signal during SPF measurement comes from dynamic disturbances such as ship motion, waves and turbulence effects. A new type of instrument for measuring SPFs is under development at CETP. It is specifically designed to work onboard dynamically unstable platforms such as ships or moored buoys, for which dynamic pressure effects are large. The selected design consists in a spherical probe that measure the SPFs and a sonic anemometer. Error analysis, simulations of the aerodynamical transfer function of the instrument, as well as preliminary experimental results will be presented

Défense (processus de) et Illustrations

International audienceDécryptage des signes inventés par Pierre Richar